Integer division and remainder are relatively complicated, expensive operations. Most modern processors have at least one integer multiplier unit that has both low latency (typically between 3 and 5 cycles) and high throughput (typically the unit can complete a multiply operation every cycle). In contrast, most modern processors do not have a fast integer division unit. Integer division has a typical latency between 30 and 50 cycles. The integer divider is typically unable to start a new divide operation until the previous divide is complete, and therefore the divider has a throughput of just one division operation every 30 to 50 cycles. The remainder (mod) operator has a similar cost, and in many cases the hardware divider unit can produce both the division and remainder at the same time.
If the divisor is known ahead of time, it can be more efficient to compute the reciprocal ahead of time, and multiply by the reciprocal instead of dividing by the divisor. In the case of integer division, the reciprocal is less than 1. The reciprocal is typically represented as a fixed point number, that is an integer multiple of a fractional value of the form 2^(-k), where k is the number of bits used to represent the reciprocal. In most cases the reciprocal is not exactly representable as a fixed-point number. The number of bits used to represent the fixed-point reciprocal has a large impact on the accuracy of the result, and a given number of bits may allow the exact answer to be computed for a range of numerators. Algorithm designers must carefully select the precision of the fixed-point reciprocal to achieve the required accuracy of the result.
When designing a special-purpose hardware accelerator, it is also possible for the designer to use an approximate multiplier. An approximate multiplier is a hardware arithmetic unit that computes an approximation of the product of two inputs. Approximate multipliers are smaller and/or faster than exact multipliers. With an approximate multiplier, the designer can choose to either increase the precision of the fixed-point reciprocal, or select a more or less accurate multiplier. The goal of the project is to develop a tool that can find a suitable fixed approximation of the reciprocal and an approximate multiplier that can achieve the required accuracy for the target application. As an example application, you can use the case of Barrett reduction for cryptography algorithms, but other applications are also possible.