Instruction usage analysis on today’s computers

A general purpose processor (CPU) uses a pre-defined instruction-set architecture (ISA) to run common workloads with a reasonable performance. For certain workloads, this performance is CPU-bound, meaning that the pre-defined instructions are not able to use the silicon efficiently. In such cases, an accelerator including GPUs or FPGAs would be appropriate to improve the performance … Read more

Adaptive hardware algorithms for instruction-level parallelism in CPUs

In this project the student will explore three types of adaptive mechanisms that exist in modern general purpose processors (CPUs): branch prediction (prediction of condition results to help with fetching near-future instructions) and cache replacement (evicting the cache blocks that are less likely to be referenced soon). The main task in this project is to … Read more

Improving GPU merge sort

Sorting is a fundamental operation undeniably important for a variety of applications, including databases, security and experimental physics. This project is to develop or port a state-of-the-art algorithm to graphics processing units (GPUs). The idea is to accelerate sorting on numbers or key-value tuples while surpassing the performance and efficiency of existing algorithms. The goal … Read more